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PLASMA ETCHING: MARKET ANALYSIS AND STRATEGIC ISSUES
Publisher: The Information Network
Published: 2016/10/01
Chapter 1 Introduction 1-1
1.1 The Need For This Report 1-1
Chapter 2 Executive Summary 2-1
2.1 Summary of Technical Issues 2-1
2.2 Summary of User Issues 2-2
2.3 Summary of Supplier Issues 2-3
2.4 Summary of Market Forecasts 2-4
Chapter 3 Technical Issues and Trends 3-1
3.1 Introduction 3-1
3.2 Processing Issues 3-14
3.2.1 Chlorine Versus Fluorine Processes 3-19
3.2.2 Multilevel Structures 3-32
3.2.3 New Materials 3-42
3.2.4 GaAs Processing 3-45
3.3 Plasma Stripping 3-46
3.3.1 Photoresist Stripping 3-46
3.3.2 Low-K Removal 3-67
3.4 Safety Issues 3-68
3.4.1 System Design Considerations 3-68
3.4.2 Gas Handling 3-69
3.4.3 Reactor Cleaning 3-71
Chapter 4 Market Forecast 4-1
4.1 Influence of Technology Trends on the Equipment Market 4-1
4.2 Market Forecast Assumptions 4-5
4.3 Market Forecast 4-6
Chapter 5 Strategic Issues: Users 5-1
5.1 Evaluating User Needs 5-1
5.1.1 Device Architecture 5-1
5.1.2 Wafer Starts and Throughput Requirements 5-5
5.1.3 Wafer Size 5-6
5.2 Benchmarking a Vendor 5-7
5.2.1 Pricing 5-7
5.2.2 Vendor Commitment and Attitudes 5-9
5.2.3 Vendor Capabilities 5-10
5.2.4 System Capabilities 5-12
5.3 Cost Analysis 5-14
5.3.1 Equipment Price 5-14
5.3.2 Installation Costs 5-17
5.3.3 Maintenance Costs 5-18
5.3.4 Sustaining Costs 5-19
5.3.5 Hidden Costs 5-19
5.4 User - Supplier Synergy 5-20
5.4.1 Feedback During Equipment Evaluation 5-20
5.4.2 Feedback During Device Production 5-21
Chapter 6 Strategic Issues: Suppliers 6-1
6.1 Competition 6-1
6.2 Customer Interaction 6-3
6.2.1 Customer Support 6-3
6.2.2 Cleanroom Needs in the Applications Lab 6-6
6.3 Equipment Compatibility in Class 1 Cleanrooms 6-7
6.3.1 Footprint Versus Serviceability 6-7
6.3.2 Particulate Generation 6-7
6.3.3 Automation 6-17
6.3.4 Etch Tools 6-20
List of Figures
3.1 Various Enhanced Designs (a) Helicon, (b) Multiple
ECR, (c) Helical Resonator 3-4
3.2 Schematic of Inductively Coupled Plasma Source 3-6
3.3 Schematic of the HRe Source 3-9
3.4 Schematic of the Dipole Magnet Source 3-10
3.5 Schematic of Chemical Downstream Etch 3-11
3.6 Silicon Trench Structure 3-21
3.7 fin/STI Etch Requirements 3-34
3.8 FinFET Gate Etch Requirements 3-36
3.9 Dual Damascene Dielectric Etch Approaches 3-38
4.1 Trends in Minimum Feature Size for Dynamic RAMS 4-4
4.2 Market Shares for Dry Etch Equipment 4-7
4.3 Market Shares for Strip Equipment 4-10
4.4 Distribution of Etch Sales by Type 4-14
4.5 Distribution of Etch Sales by Device 4-16
4.6 Geographical Distribution of Equipment Purchases 4-18
5.1 Typical First Year Single Wafer System Cost Analysis 5-16
6.1 Relationship Between Device Yield and Particles 6-9
6.2 Sources of Particles 6-12
6.3 Relationship Between Die Yield and Chip Size 6-16
List of Tables
3.1 Silicon Wafer Usage 3-2
3.2 Plasma Source Comparison 3-13
3.3 Typical Process Specifications 3-18
4.1 Worldwide Dry Etch Market Shares 4-8
4.2 Worldwide Dry Strip Market Shares 4-11
4.3 Worldwide Market Forecast of Plasma Etching Systems 4-12
4.4 Distribution of Etch Sales by Device by Vendor 4-15
4.5 Number of Layers To Be Etched 4-19
5.1 Levels of Integration of Dynamic Rams 5-3
5.2 Interconnect Levels of Logic Devices 5-4
6.1 Etch Process Specifications 6-21
1.1 The Need For This Report 1-1
Chapter 2 Executive Summary 2-1
2.1 Summary of Technical Issues 2-1
2.2 Summary of User Issues 2-2
2.3 Summary of Supplier Issues 2-3
2.4 Summary of Market Forecasts 2-4
Chapter 3 Technical Issues and Trends 3-1
3.1 Introduction 3-1
3.2 Processing Issues 3-14
3.2.1 Chlorine Versus Fluorine Processes 3-19
3.2.2 Multilevel Structures 3-32
3.2.3 New Materials 3-42
3.2.4 GaAs Processing 3-45
3.3 Plasma Stripping 3-46
3.3.1 Photoresist Stripping 3-46
3.3.2 Low-K Removal 3-67
3.4 Safety Issues 3-68
3.4.1 System Design Considerations 3-68
3.4.2 Gas Handling 3-69
3.4.3 Reactor Cleaning 3-71
Chapter 4 Market Forecast 4-1
4.1 Influence of Technology Trends on the Equipment Market 4-1
4.2 Market Forecast Assumptions 4-5
4.3 Market Forecast 4-6
Chapter 5 Strategic Issues: Users 5-1
5.1 Evaluating User Needs 5-1
5.1.1 Device Architecture 5-1
5.1.2 Wafer Starts and Throughput Requirements 5-5
5.1.3 Wafer Size 5-6
5.2 Benchmarking a Vendor 5-7
5.2.1 Pricing 5-7
5.2.2 Vendor Commitment and Attitudes 5-9
5.2.3 Vendor Capabilities 5-10
5.2.4 System Capabilities 5-12
5.3 Cost Analysis 5-14
5.3.1 Equipment Price 5-14
5.3.2 Installation Costs 5-17
5.3.3 Maintenance Costs 5-18
5.3.4 Sustaining Costs 5-19
5.3.5 Hidden Costs 5-19
5.4 User - Supplier Synergy 5-20
5.4.1 Feedback During Equipment Evaluation 5-20
5.4.2 Feedback During Device Production 5-21
Chapter 6 Strategic Issues: Suppliers 6-1
6.1 Competition 6-1
6.2 Customer Interaction 6-3
6.2.1 Customer Support 6-3
6.2.2 Cleanroom Needs in the Applications Lab 6-6
6.3 Equipment Compatibility in Class 1 Cleanrooms 6-7
6.3.1 Footprint Versus Serviceability 6-7
6.3.2 Particulate Generation 6-7
6.3.3 Automation 6-17
6.3.4 Etch Tools 6-20
List of Figures
3.1 Various Enhanced Designs (a) Helicon, (b) Multiple
ECR, (c) Helical Resonator 3-4
3.2 Schematic of Inductively Coupled Plasma Source 3-6
3.3 Schematic of the HRe Source 3-9
3.4 Schematic of the Dipole Magnet Source 3-10
3.5 Schematic of Chemical Downstream Etch 3-11
3.6 Silicon Trench Structure 3-21
3.7 fin/STI Etch Requirements 3-34
3.8 FinFET Gate Etch Requirements 3-36
3.9 Dual Damascene Dielectric Etch Approaches 3-38
4.1 Trends in Minimum Feature Size for Dynamic RAMS 4-4
4.2 Market Shares for Dry Etch Equipment 4-7
4.3 Market Shares for Strip Equipment 4-10
4.4 Distribution of Etch Sales by Type 4-14
4.5 Distribution of Etch Sales by Device 4-16
4.6 Geographical Distribution of Equipment Purchases 4-18
5.1 Typical First Year Single Wafer System Cost Analysis 5-16
6.1 Relationship Between Device Yield and Particles 6-9
6.2 Sources of Particles 6-12
6.3 Relationship Between Die Yield and Chip Size 6-16
List of Tables
3.1 Silicon Wafer Usage 3-2
3.2 Plasma Source Comparison 3-13
3.3 Typical Process Specifications 3-18
4.1 Worldwide Dry Etch Market Shares 4-8
4.2 Worldwide Dry Strip Market Shares 4-11
4.3 Worldwide Market Forecast of Plasma Etching Systems 4-12
4.4 Distribution of Etch Sales by Device by Vendor 4-15
4.5 Number of Layers To Be Etched 4-19
5.1 Levels of Integration of Dynamic Rams 5-3
5.2 Interconnect Levels of Logic Devices 5-4
6.1 Etch Process Specifications 6-21